The operation of a digital system may be predicted by a logic simulation. A logic simulation of a digital system may be used to predict the operation of the system prior to implementing the system in hardware, based on a description of the system in a hardware description language (HDL). The logic simulation may predict system operation by providing a time sequence of values for every output and every internal signal of the digital system when given a particular time sequence of values for the inputs of the digital system. The response of the digital system may be predicted for various input scenarios by respective logic simulations.
During the development of a digital system, a designer may examine the predicted operation provided by logic simulations of various scenarios to discover unintended behavior. Unintended behavior is typically exposed by a symptom that occurs somewhat later in simulation time than the cause of the unintended behavior. A designer may use the signal values generated by the logic simulation to trace backwards in simulation time from the symptom of a defect to the cause of a defect.
Logic simulation is invaluable to discover and fix defects in a digital system prior to implementing the digital system in hardware. Execution speed is an important characteristic of a logic simulation. The execution speed of a logic simulation may determine how long a designer has to wait for the results for a scenario. The execution speed may limit the number scenarios that may be attempted.
The present invention may address one or more of the above issues.